#
# 68k_test_6
#
# sixth test file for the 68k core testing program
#
# tests ADD/ADDA/ADDX instructions in the 0xdxxx range
#

# $Id$

#
# NOTE: Someone plays fast and loose with flags...
#

# test ADD.B d0, d1 (0xd101)
start add.b d0, d1 (0xd101), take 1
set mem 0x002000 = 0xd101
set reg d0 = 0x00000000
set reg d1 = 0x00000000
set pc 0x002000
set flags 0x0000
set cycles 4
run
check reg d1 = 0x00000000
check pc 0x002002
check flags 0x0004
check cycles 0
done

# test ADD.B d0, d1 (0xd101)
start add.b d0, d1 (0xd101), take 2
set mem 0x002000 = 0xd101
set reg d0 = 0x00000001
set reg d1 = 0x00000001
set pc 0x002000
set flags 0x0000
set cycles 4
run
check reg d1 = 0x00000002
check pc 0x002002
check flags 0x0000
check cycles 0
done

# test ADD.B d0, d1 (0xd101)
start add.b d0, d1 (0xd101), take 3
set mem 0x002000 = 0xd101
set reg d0 = 0x00000040
set reg d1 = 0x00000040
set pc 0x002000
set flags 0x0000
set cycles 4
run
check reg d1 = 0x00000080
check pc 0x002002
check flags 0x000a
check cycles 0
done

# test ADD.B d0, d1 (0xd101)
start add.b d0, d1 (0xd101), take 4
set mem 0x002000 = 0xd101
set reg d0 = 0x00000080
set reg d1 = 0x00000080
set pc 0x002000
set flags 0x0000
set cycles 4
run
check reg d1 = 0x00000000
check pc 0x002002
check flags 0x0017
check cycles 0
done

# test ADD.B d0, d1 (0xd200)
start add.b d0, d1 (0xd200), take 1
set mem 0x002000 = 0xd200
set reg d0 = 0x00000000
set reg d1 = 0x00000000
set pc 0x002000
set flags 0x0000
set cycles 4
run
check reg d1 = 0x00000000
check pc 0x002002
check flags 0x0004
check cycles 0
done

# test ADD.B d0, d1 (0xd200)
start add.b d0, d1 (0xd200), take 2
set mem 0x002000 = 0xd200
set reg d0 = 0x00000001
set reg d1 = 0x00000001
set pc 0x002000
set flags 0x0000
set cycles 4
run
check reg d1 = 0x00000002
check pc 0x002002
check flags 0x0000
check cycles 0
done

# test ADD.B d0, d1 (0xd200)
start add.b d0, d1 (0xd200), take 3
set mem 0x002000 = 0xd200
set reg d0 = 0x00000040
set reg d1 = 0x00000040
set pc 0x002000
set flags 0x0000
set cycles 4
run
check reg d1 = 0x00000080
check pc 0x002002
check flags 0x000a
check cycles 0
done

# test ADD.B d0, d1 (0xd200)
start add.b d0, d1 (0xd200), take 4
set mem 0x002000 = 0xd200
set reg d0 = 0x00000080
set reg d1 = 0x00000080
set pc 0x002000
set flags 0x0000
set cycles 4
run
check reg d1 = 0x00000000
check pc 0x002002
check flags 0x0017
check cycles 0
done

# test ADDA.W d0, a0
start adda.w d0, a0, take 1
set mem 0x002000 = 0xd0c0
set reg d0 = 0x00000000
set reg a0 = 0x00000000
set pc 0x002000
set cycles 8
run
check reg a0 = 0x00000000
check pc 0x002002
check cycles 0
done

# test ADDA.W d0, a0
start adda.w d0, a0, take 2
set mem 0x002000 = 0xd0c0
set reg d0 = 0x0000ffff
set reg a0 = 0x00000000
set pc 0x002000
set cycles 8
run
check reg a0 = 0xffffffff
check pc 0x002002
check cycles 0
done

# test ADDA.W d0, a0
start adda.w d0, a0, take 3
set mem 0x002000 = 0xd0c0
set reg d0 = 0x00000001
set reg a0 = 0x0000ffff
set pc 0x002000
set cycles 8
run
check reg a0 = 0x00010000
check pc 0x002002
check cycles 0
done

# test ADDA.W d0, a0
start adda.w d0, a0, take 4
set mem 0x002000 = 0xd0c0
set reg d0 = 0x0000ffff
set reg a0 = 0x00010000
set pc 0x002000
set cycles 8
run
check reg a0 = 0x0000ffff
check pc 0x002002
check cycles 0
done

# test ADD.W d0, d1 (0xd141)
start add.w d0, d1 (0xd141), take 1
set mem 0x002000 = 0xd141
set reg d0 = 0x00000000
set reg d1 = 0x00000000
set pc 0x002000
set flags 0x0000
set cycles 4
run
check reg d1 = 0x00000000
check pc 0x002002
check flags 0x0004
check cycles 0
done

# test ADD.W d0, d1 (0xd141)
start add.w d0, d1 (0xd141), take 2
set mem 0x002000 = 0xd141
set reg d0 = 0x00000001
set reg d1 = 0x00000001
set pc 0x002000
set flags 0x0000
set cycles 4
run
check reg d1 = 0x00000002
check pc 0x002002
check flags 0x0000
check cycles 0
done

# test ADD.W d0, d1 (0xd141)
start add.w d0, d1 (0xd141), take 3
set mem 0x002000 = 0xd141
set reg d0 = 0x00004000
set reg d1 = 0x00004000
set pc 0x002000
set flags 0x0000
set cycles 4
run
check reg d1 = 0x00008000
check pc 0x002002
check flags 0x000a
check cycles 0
done

# test ADD.W d0, d1 (0xd141)
start add.w d0, d1 (0xd141), take 4
set mem 0x002000 = 0xd141
set reg d0 = 0x00008000
set reg d1 = 0x00008000
set pc 0x002000
set flags 0x0000
set cycles 4
run
check reg d1 = 0x00000000
check pc 0x002002
check flags 0x0017
check cycles 0
done

# test ADD.W d0, d1 (0xd240)
start add.w d0, d1 (0xd240), take 1
set mem 0x002000 = 0xd240
set reg d0 = 0x00000000
set reg d1 = 0x00000000
set pc 0x002000
set flags 0x0000
set cycles 4
run
check reg d1 = 0x00000000
check pc 0x002002
check flags 0x0004
check cycles 0
done

# test ADD.W d0, d1 (0xd240)
start add.w d0, d1 (0xd240), take 2
set mem 0x002000 = 0xd240
set reg d0 = 0x00000001
set reg d1 = 0x00000001
set pc 0x002000
set flags 0x0000
set cycles 4
run
check reg d1 = 0x00000002
check pc 0x002002
check flags 0x0000
check cycles 0
done

# test ADD.W d0, d1 (0xd240)
start add.w d0, d1 (0xd240), take 3
set mem 0x002000 = 0xd240
set reg d0 = 0x00004000
set reg d1 = 0x00004000
set pc 0x002000
set flags 0x0000
set cycles 4
run
check reg d1 = 0x00008000
check pc 0x002002
check flags 0x000a
check cycles 0
done

# test ADD.W d0, d1 (0xd240)
start add.w d0, d1 (0xd240), take 4
set mem 0x002000 = 0xd240
set reg d0 = 0x00008000
set reg d1 = 0x00008000
set pc 0x002000
set flags 0x0000
set cycles 4
run
check reg d1 = 0x00000000
check pc 0x002002
check flags 0x0017
check cycles 0
done

# test ADD.L d0, d1 (0xd280)
start add.l d0, d1 (0xd280), take 1
set mem 0x002000 = 0xd280
set reg d0 = 0x00000000
set reg d1 = 0x00000000
set pc 0x002000
set flags 0x0000
set cycles 8
run
check reg d1 = 0x00000000
check pc 0x002002
check flags 0x0004
check cycles 0
done

# test ADD.L d0, d1 (0xd280)
start add.l d0, d1 (0xd280), take 2
set mem 0x002000 = 0xd280
set reg d0 = 0x00008000
set reg d1 = 0x00008000
set pc 0x002000
set flags 0x0000
set cycles 8
run
check reg d1 = 0x00010000
check pc 0x002002
check flags 0x0000
check cycles 0
done

# test ADD.L d0, d1 (0xd280)
start add.l d0, d1 (0xd280), take 3
set mem 0x002000 = 0xd280
set reg d0 = 0x80000000
set reg d1 = 0x80000000
set pc 0x002000
set flags 0x0000
set cycles 8
run
check reg d1 = 0x00000000
check pc 0x002002
check flags 0x0017
check cycles 0
done

#
# $Log$
#
