//
// Project UnReality: The First Nintendo 64 Emulator
// Copyright (C) 1997-1998, Cold Fusion Entertainment
// All rights reserved
//
// This source code is unpublished propietary information of Cold Fusion Entertainment.  No portion of this software
// may be disclosed to any third party or copied or duplicated in any form, in whole or in part, without the prior
// written consent of Cold Fusion Entertainment.
// 

//
// $Log: MMIO.H $
// Revision 1.4  1998/04/02 21:18:51  BREAKPOINT
// Implemented new memory mapping routines and changed ROM loading code.
// Revision 1.3  1998/03/26 23:26:49  BREAKPOINT
// Added Brian code
// Revision 1.2  1998/01/31 19:59:01  BREAKPOINT
// Changed stuff to support new MMIO callbacks.
// Revision 1.1  1998/01/10 01:28:05  BREAKPOINT
// Initial revision
//

//---------------------------------------------------------------------------------------------------------------------

#ifndef MMIO_H
#define MMIO_H

#define SIZE_BYTE           1
#define SIZE_WORD           2
#define SIZE_DWORD          4
#define SIZE_64             8

#define TYPE_READ           1
#define TYPE_WRITE          2

void InitLog(void);
void Log(int t, char *txt, ulong val);

void MMIO_DoNothing_Read(void);
void MMIO_DoNothing_Write(void);
void RDRAM_Temp_Read(void);
void RDRAM_Temp_Write(void);

void RDRAM_Reg_Read(void);
void SP_Reg_Read(void);
void SP_PC_Read(void);
void SP_IBIST_Read(void);
void DPC_Reg_Read(void);
void DPS_Reg_Read(void);
void MI_Reg_Read(void);
void VI_Reg_Read(void);
void AI_Reg_Read(void);
void PI_Reg_Read(void);
void RI_Reg_Read(void);
void SI_Reg_Read(void);
void PIF_ROM_Reg_Read(void);
void PIF_RAM_Reg_Read(void);
void LEO_Reg_Read(void);

void RDRAM_Reg_Write(void);
void SP_Reg_Write(void);
void SP_PC_Write(void);
void SP_IBIST_Write(void);
void DPC_Reg_Write(void);
void DPS_Reg_Write(void);
void MI_Reg_Write(void);
void VI_Reg_Write(void);
void AI_Reg_Write(void);
void PI_Reg_Write(void);
void RI_Reg_Write(void);
void SI_Reg_Write(void);
void PIF_ROM_Reg_Write(void);
void PIF_RAM_Reg_Write(void);
void LEO_Reg_Write(void);


void RDRAM_RegRead_CONFIG(void);
void RDRAM_RegRead_DEVICE_ID(void);
void RDRAM_RegRead_DELAY(void);
void RDRAM_RegRead_MODE(void);
void RDRAM_RegRead_REF_INTERVAL(void);
void RDRAM_RegRead_REF_ROW(void);
void RDRAM_RegRead_RAS_INTERVAL(void);
void RDRAM_RegRead_MIN_INTERVAL(void);
void RDRAM_RegRead_ADDR_SELECT(void);
void RDRAM_RegRead_DEVICE_MANUF(void);


void SP_RegRead_MEM_ADDR(void);
void SP_RegRead_DRAM_ADDR(void);
void SP_RegRead_RD_LEN(void);
void SP_RegRead_WR_LEN(void);
void SP_RegRead_STATUS(void);
void SP_RegRead_DMA_FULL(void);
void SP_RegRead_DMA_BUSY(void);
void SP_RegRead_SEMAPHORE(void);

void DPC_RegRead_START(void);
void DPC_RegRead_END(void);
void DPC_RegRead_CURRENT(void);
void DPC_RegRead_STATUS(void);
void DPC_RegRead_CLOCK(void);
void DPC_RegRead_BUFBUSY(void);
void DPC_RegRead_PIPEBUSY(void);
void DPC_RegRead_TMEM(void);


void VI_RegRead_STATUS(void);
void VI_RegRead_ORIGIN(void);
void VI_RegRead_WIDTH(void);
void VI_RegRead_INTR(void);
void VI_RegRead_CURRENT(void);
void VI_RegRead_BURST(void);
void VI_RegRead_V_SYNC(void);
void VI_RegRead_H_SYNC(void);
void VI_RegRead_LEAP(void);
void VI_RegRead_H_START(void);
void VI_RegRead_V_START(void);
void VI_RegRead_V_BURST(void);
void VI_RegRead_X_SCALE(void);
void VI_RegRead_Y_SCALE(void);

void AI_RegRead_DRAM_ADDR(void);
void AI_RegRead_LEN(void);
void AI_RegRead_CONTROL(void);
void AI_RegRead_STATUS(void);
void AI_RegRead_DACRATE(void);
void AI_RegRead_BITRATE(void);

void PI_RegRead_DRAM_ADDR(void);
void PI_RegRead_CART_ADDR(void);
void PI_RegRead_RD_LEN(void);
void PI_RegRead_WR_LEN(void);
void PI_RegRead_STATUS(void);
void PI_RegRead_BSD_DOM1_LAT(void);
void PI_RegRead_BSD_DOM1_PWD(void);
void PI_RegRead_BSD_DOM1_PGS(void);
void PI_RegRead_BSD_DOM1_RLS(void);
void PI_RegRead_BSD_DOM2_LAT(void);
void PI_RegRead_BSD_DOM2_PWD(void);
void PI_RegRead_BSD_DOM2_PGS(void);
void PI_RegRead_BSD_DOM2_RLS(void);

void RI_RegRead_MODE(void);
void RI_RegRead_CONFIG(void);
void RI_RegRead_CURRENT_LOAD(void);
void RI_RegRead_SELECT(void);
void RI_RegRead_REFRESH(void);
void RI_RegRead_LATENCY(void);
void RI_RegRead_RERROR(void);
void RI_RegRead_WERROR(void);


void RDRAM_RegWrite_CONFIG(void);
void RDRAM_RegWrite_DEVICE_ID(void);
void RDRAM_RegWrite_DELAY(void);
void RDRAM_RegWrite_MODE(void);
void RDRAM_RegWrite_REF_INTERVAL(void);
void RDRAM_RegWrite_REF_ROW(void);
void RDRAM_RegWrite_RAS_INTERVAL(void);
void RDRAM_RegWrite_MIN_INTERVAL(void);
void RDRAM_RegWrite_ADDR_SELECT(void);
void RDRAM_RegWrite_DEVICE_MANUF(void);

void CPU_RSP_SP_RegWrite_MEM_ADDR(ulong Val);
void SP_RegWrite_MEM_ADDR(void);
void CPU_RSP_SP_RegWrite_DRAM_ADDR(ulong Val);
void SP_RegWrite_DRAM_ADDR(void);
void CPU_RSP_SP_RegWrite_RD_LEN(ulong Val);
void SP_RegWrite_RD_LEN(void);
void CPU_RSP_SP_RegWrite_WR_LEN(ulong Val);
void SP_RegWrite_WR_LEN(void);
void CPU_RSP_SP_RegWrite_STATUS(ulong Val);
void SP_RegWrite_STATUS(void);
void CPU_RSP_SP_RegWrite_DMA_FULL(ulong Val);
void SP_RegWrite_DMA_FULL(void);
void CPU_RSP_SP_RegWrite_DMA_BUSY(ulong Val);
void SP_RegWrite_DMA_BUSY(void);
void CPU_RSP_SP_RegWrite_SEMAPHORE(ulong Val);
void SP_RegWrite_SEMAPHORE(void);

void CPU_RSP_DPC_RegWrite_START(ulong Val);
void DPC_RegWrite_START(void);
void CPU_RSP_DPC_RegWrite_END(ulong Val);
void DPC_RegWrite_END(void);
void CPU_RSP_DPC_RegWrite_CURRENT(ulong Val);
void DPC_RegWrite_CURRENT(void);
void CPU_RSP_DPC_RegWrite_STATUS(ulong Val);
void DPC_RegWrite_STATUS(void);
void CPU_RSP_DPC_RegWrite_CLOCK(ulong Val);
void DPC_RegWrite_CLOCK(void);
void CPU_RSP_DPC_RegWrite_BUFBUSY(ulong Val);
void DPC_RegWrite_BUFBUSY(void);
void CPU_RSP_DPC_RegWrite_PIPEBUSY(ulong Val);
void DPC_RegWrite_PIPEBUSY(void);
void CPU_RSP_DPC_RegWrite_TMEM(ulong Val);
void DPC_RegWrite_TMEM(void);

void VI_RegWrite_STATUS(void);
void VI_RegWrite_ORIGIN(void);
void VI_RegWrite_WIDTH(void);
void VI_RegWrite_INTR(void);
void VI_RegWrite_CURRENT(void);
void VI_RegWrite_BURST(void);
void VI_RegWrite_V_SYNC(void);
void VI_RegWrite_H_SYNC(void);
void VI_RegWrite_LEAP(void);
void VI_RegWrite_H_START(void);
void VI_RegWrite_V_START(void);
void VI_RegWrite_V_BURST(void);
void VI_RegWrite_X_SCALE(void);
void VI_RegWrite_Y_SCALE(void);

void AI_RegWrite_DRAM_ADDR(void);
void AI_RegWrite_LEN(void);
void AI_RegWrite_CONTROL(void);
void AI_RegWrite_STATUS(void);
void AI_RegWrite_DACRATE(void);
void AI_RegWrite_BITRATE(void);

void PI_RegWrite_DRAM_ADDR(void);
void PI_RegWrite_CART_ADDR(void);
void PI_RegWrite_RD_LEN(void);
void PI_RegWrite_WR_LEN(void);
void PI_RegWrite_STATUS(void);
void PI_RegWrite_BSD_DOM1_LAT(void);
void PI_RegWrite_BSD_DOM1_PWD(void);
void PI_RegWrite_BSD_DOM1_PGS(void);
void PI_RegWrite_BSD_DOM1_RLS(void);
void PI_RegWrite_BSD_DOM2_LAT(void);
void PI_RegWrite_BSD_DOM2_PWD(void);
void PI_RegWrite_BSD_DOM2_PGS(void);
void PI_RegWrite_BSD_DOM2_RLS(void);

void RI_RegWrite_MODE(void);
void RI_RegWrite_CONFIG(void);
void RI_RegWrite_CURRENT_LOAD(void);
void RI_RegWrite_SELECT(void);
void RI_RegWrite_REFRESH(void);
void RI_RegWrite_LATENCY(void);
void RI_RegWrite_RERROR(void);
void RI_RegWrite_WERROR(void);

#endif
